ad9361_data_sub HDL Worker

Detail

This worker’s LVDS_p, HALF_DUPLEX_p, SINGLE_PORT_p, and SWAP_PORTS_p parameter properties enforce build-time configuration1 for all of the possible AD9361 data pin interface configurations:

• CMOS Single Port Half Duplex,

• CMOS Single Port Half Duplex Swapped Ports,

• CMOS Single Port Full Duplex,

• CMOS Single Port Full Duplex Swapped Ports,

• CMOS Dual Port Half Duplex,

• CMOS Dual Port Half Duplex Swapped Ports,

• CMOS Dual Port Full Duplex,

• CMOS Dual Port Full Duplex Swapped Ports, and

• LVDS (Dual Port Full Duplex).

Note that the half duplex data interface formats allow for AD9361 P0/P1 port routing to be runtime-dynamic.

Control Timing and Signals

Because this worker does not include a control plane and serves purely as an IC pin buffering and routing mechanism, there are no latency or clock domain considerations. For considerations specific to the RX/TX data paths, see the supports-connected device worker data sheets for ad9361_adc_sub.hdl Ad9361 adc (ad9361_adc) and ad9361_dac_sub.hdl Ad9361 dac (ad9361_dac).

Performance and Resource Utilization

Because every possible parameter property combination of this worker has no control plane and no registered data paths, no registers or LUTs are used and the Fmax measurement does not exist.

Worker Properties

• LVDS_p

  • Type: bool

  • Access:

    • Parameter: True

    • Writable: False

    • Initial: False

    • Volatile: False

    • Read back: False

  • Default value: None

• HALF_DUPLEX_p

  • Type: bool

  • Access:

    • Parameter: True

    • Writable: False

    • Initial: False

    • Volatile: False

    • Read back: False

  • Default value: None

• SINGLE_PORT_p

  • Type: bool

  • Access:

    • Parameter: True

    • Writable: False

    • Initial: False

    • Volatile: False

    • Read back: False

  • Default value: None

• SWAP_PORTS_p

  • Type: bool

  • Access:

    • Parameter: True

    • Writable: False

    • Initial: False

    • Volatile: False

    • Read back: False

  • Default value: None

• MODE_p

  • Type: uchar

  • Access:

    • Parameter: True

    • Writable: False

    • Initial: False

    • Volatile: False

    • Read back: False

  • Default value: None

• DATA_CLK_Delay

  • Type: ushort

  • Access:

    • Parameter: True

    • Writable: False

    • Initial: False

    • Volatile: False

    • Read back: False

  • Default value: None

• RX_Data_Delay

  • Type: ushort

  • Access:

    • Parameter: True

    • Writable: False

    • Initial: False

    • Volatile: False

    • Read back: False

  • Default value: None

• FB_CLK_Delay

  • Type: ushort

  • Access:

    • Parameter: True

    • Writable: False

    • Initial: False

    • Volatile: False

    • Read back: False

  • Default value: None

• TX_Data_Delay

  • Type: ushort

  • Access:

    • Parameter: True

    • Writable: False

    • Initial: False

    • Volatile: False

    • Read back: False

  • Default value: None

Worker Ports

Interfaces (other than data I/O ports):

• dev_cfg_data_port

  • Type: devsignal

• dev_data_clk

  • Type: devsignal

• dev_data_adc

  • Type: devsignal

• dev_data_dac

  • Type: devsignal

• dev_txen_dac

  • Type: devsignal

• dev_rxen_config

  • Type: devsignal

• dev_txen_config

  • Type: devsignal

Subdevice Connections:

• Supported device worker: ad9361_config

  
  

  Connections:

  
  

  • Subdevice port: dev_cfg_data_port

  • Supported worker port: dev_cfg_data_port

    • Index: None

  
  

  • Subdevice port: dev_rxen_data_sub

  • Supported worker port: dev_rxen_config

    • Index: None

  
  

  • Subdevice port: dev_txen_data_sub

  • Supported worker port: dev_txen_config

    • Index: None

  
  

  • Subdevice port: dev_data_clk

  • Supported worker port: dev_data_clk

    • Index: 2

  
  

• Supported device worker: ad9361_adc_sub

  
  

  Connections:

  
  

  • Subdevice port: dev_data_clk

  • Supported worker port: dev_data_clk

    • Index: 0

  
  

  • Subdevice port: dev_data_from_pins

  • Supported worker port: dev_data_adc

    • Index: None

  
  

• Supported device worker: ad9361_dac_sub

  
  

  Connections:

  
  

  • Subdevice port: dev_data_clk

  • Supported worker port: dev_data_clk

    • Index: 1

  
  

  • Subdevice port: dev_data_to_pins

  • Supported worker port: dev_data_dac

    • Index: None

  
  

  • Subdevice port: dev_txen

  • Supported worker port: dev_txen_dac

    • Index: None

  
  

Worker Signals

• iostandard_is_lvds

  • Direction: in

  • Differential: false

  • Pin: false

• p0_p1_are_swapped

  • Direction: in

  • Differential: false

  • Pin: false

• DATA_CLK_P

  • Direction: in

  • Differential: false

  • Pin: true

• data

  • Direction: out

  • Width: 24

  • Differential: false

  • Pin: false

• rx_frame

  • Direction: in

  • Differential: false

  • Pin: false

• tx_frame

  • Direction: out

  • Differential: false

  • Pin: false

• txen

  • Direction: in

  • Differential: false

  • Pin: false

• rxen

  • Direction: in

  • Differential: false

  • Pin: false

• DATA_CLK_N

  • Direction: lvds_p ? in : unused

  • Differential: false

  • Pin: true

• RX_FRAME_P

  • Direction: in

  • Differential: false

  • Pin: true

• RX_FRAME_N

  • Direction: lvds_p ? in : unused

  • Differential: false

  • Pin: true

• FB_CLK_P

  • Direction: out

  • Differential: false

  • Pin: true

• FB_CLK_N

  • Direction: out

  • Differential: false

  • Pin: true

• TX_FRAME_P

  • Direction: out

  • Differential: false

  • Pin: true

• TX_FRAME_N

  • Direction: out

  • Differential: false

  • Pin: true

• P0_D_11_6

  • Direction: mode_p == 0 || mode_p == 4 ? inout :         mode_p == 1 || mode_p == 3 ? unused :        mode_p == 5 ? in : out

  • Width: 6

  • Differential: false

  • Pin: true

• P0_D_5_0

  • Direction: mode_p == 0 || mode_p == 4 ? inout :        mode_p == 1 || mode_p == 3 ? unused :        mode_p == 2 || mode_p == 5 ? in :        out

  • Width: 6

  • Differential: false

  • Pin: true

• P1_D_11_6

  • Direction: mode_p == 0 || mode_p == 2 ? unused :        mode_p == 1 || mode_p == 4 ? inout :        mode_p == 6 || mode_p == 7 ? in :        out

  • Width: 6

  • Differential: false

  • Pin: true

• P1_D_5_0

  • Direction: mode_p == 0 || mode_p == 2 ? unused :        mode_p == 1 || mode_p == 4 ? inout :        mode_p == 5 ? out :        in

  • Width: 6

  • Differential: false

  • Pin: true

Utilization

Utilization reporting is not currently implemented.

1

Although this worker successfully builds for all data interface configurations, LVDS is the only configuration which has been tested and fully verified

References

• AD9361 data pin interface configurations

• Ad9361 adc (ad9361_adc)

• Ad9361 dac (ad9361_dac)