Csts to iqstream (csts_to_iqstream)
csts_to_iqstream is an asset in the ocpi.assets.misc_comps component library. Implementations include csts_to_iqstream HDL Worker (csts_to_iqstream.hdl). Tested platforms include Rocky9, xsim, zed.
Design
This component receives ComplexShortTimedSample protocol messages from the in port and converts them to iqstream protocol messages that are transmitted to the out port. The messages for all possible ComplexShortTimedSample opcodes are ingested, but only those with the sample opcode are converted and sent out the out port. This is due to the fact that ComplexShortTimedSample has not only a data-related opcode, but multiple non-data-related opcodes, and the iqstream protocol only has a single, data-related opcode. All out port messages use the iqstream protocol’s iq opcode.
Block diagram
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Interface
<ComponentSpec>
<Port name='in' producer='false' protocol='complex_short_timed_sample-prot' optional='true'/>
<Port name='out' producer='true' protocol='iqstream_protocol' optional='true'/>
</ComponentSpec>
Properties
None.
Ports
Inputs:
inProtocol:
complex_short_timed_sample-protOptional:
True
Outputs:
outProtocol:
iqstream_protocolOptional:
True
Implementations
csts_to_iqstream(HDL)
Dependencies
The dependencies to other elements in OpenCPI are:
core/hdl/primitives/util/reset_detector.vhd
core/hdl/primitives/protocol/iqstream_body.vhd
core/hdl/primitives/protocol/iqstream_pkg.vhd
core/hdl/primitives/protocol/message_sizer.vhd
core/hdl/primitives/timed_sample_prot/complex_short_timed_sample_body.vhd
core/hdl/primitives/timed_sample_prot/complex_short_timed_sample_package.vhd
core/hdl/primitives/timed_sample_prot/complex_short_timed_sample_demarshaller.vhd
core/hdl/primitives/protocol/iqstream_marshaller.vhd
assets/components/misc_comps/csts_to_iqstream.hdl/csts_to_iqstream.vhd
Limitations
Limitations of csts_to_iqstream are:
None.
Testing
The Unit Under Test (UUT) is tested by a) generating a file containing protocol-formatted messages which are sent to the UUT via the file_read component, b) using the file_write component to save the file containing the UUT’s output as protocol-formatted message, and c) verifying the contents of the output file. The generated file contains one or more ComplexShortTimedSample samples messages following followed by a message for each of the non-sample opcodes. The sequence of samples messages include samples whose I (Real) and Q (imaginary) signals are positive and negative ramp functions, respectively. The output file is verified by confirming that a) the same number of samples exists in the input and output files, and b) the output file contains the same ramp functions as the input.