Timeout Monitor (timeout_monitor)

Inserts an End of Message (EOM) if the time difference between samples exceeds a timeout value.

Design

To avoid a trailing EOM in output messages, where output_eom is 1, output_som is 0 and output_valid is 0, the last received input is registered internally and is not output unless an EOM is received or a timeout event occurs. This allows the EOM to be output with the final sample of the message.

Implementation

Stores the input interface signals in internal registers when enable and take_in are 1. When mid-message, if the difference in time from the last received sample exceeds the timeout_in value, the registered data held will be output with output_eom and timeout_out asserted.

Interface

Generics

  • sample_opcode_g (std_logic_vector): Sets the value of the opcode that will trigger the latest time value to be used as the old time to compare against.

  • data_width_g (positive): Sets the width of the interface data signal.

  • time_width_g (positive): Sets the width of the timeout data signals. Should be set to be the length of the fractional part of the time interface.

  • opcode_width_g (positive): Sets the width of the interface opcode signal.

  • byte_enable_width_g (positive): Sets the width of the interface byte enable signal.

Ports

  • clk (std_logic), in: Clock. Inputs and outputs registered on rising edge.

  • reset (std_logic), in: Reset. Active high, synchronous with rising edge of clock.

  • enable (std_logic), in: Enable. When high, the delay pipeline can be advanced by the other control signals.

  • take_in (std_logic), in: Triggers the storing of interface data in the internal shift registers. Shifts the shift registers. Qualifies input_ready and input_valid.

  • timeout_in (unsigned, time_width_g bits), in: The timeout value used to measure against the change in the current time_fraction and the previous time_fraction values. Timeout functionality is disabled when this is set to 0.

  • time_valid (std_logic), in: Valid signal from OpenCPI time interface.

  • time_fraction (unsigned, time_width_g bits), in: Data signal from OpenCPI time interface.

  • input_som (std_logic), in: SOM signal from OpenCPI interface.

  • input_eom (std_logic), in: EOM signal from OpenCPI interface.

  • input_eof (std_logic), in: EOF signal from OpenCPI interface. Secondary trigger that will shift the internal shift registers.

  • input_valid (std_logic), in: Valid signal from OpenCPI interface.

  • input_ready (std_logic), in: Ready signal from OpenCPI interface.

  • input_byte_enable (std_logic_vector, byte_enable_width_g bits), in: Byte enable signal from OpenCPI interface.

  • input_opcode (std_logic_vector, opcode_width_g bits), in: Opcode signal from OpenCPI interface.

  • input_data (std_logic_vector, data_width_g bits), in: Data signal from OpenCPI interface.

  • timeout_out (std_logic), out: Timeout signal to indicate when a timeout has occurred.

  • output_som (std_logic), out: SOM signal on output OpenCPI interface.

  • output_eom (std_logic), out: EOM signal on output OpenCPI interface.

  • output_eof (std_logic), out: EOF signal on output OpenCPI interface.

  • output_valid (std_logic), out: Valid signal on output OpenCPI interface.

  • output_give (std_logic), out: Give signal on output OpenCPI interface.

  • output_byte_enable (std_logic_vector, byte_enable_width_g bits), out: Byte enable signal on output OpenCPI interface.

  • output_opcode (std_logic_vector, opcode_width_g bits), out: Opcode signal on output OpenCPI interface.

  • output_data (std_logic_vector, data_width_g bits), out: Data signal on output OpenCPI interface.

Dependencies

The dependencies to other elements in OpenCPI are:

  • None.

There is also a dependency on:

  • ieee.std_logic_1164

  • ieee.numeric_std

Limitations

Limitations of timeout_monitor are:

  • Timeout triggering at the right time has not been fully tested.