Preparing HDL Assemblies for Use by Applications

Developing HDL component implementations (workers) for FPGAs is out of scope for this application development guide. That process is fully described in the OpenCPI HDL Development Guide. Utilizing FPGAs in OpenCPI requires that component libraries, with built/compiled HDL/FPGA workers, be supplied forapplications to use FPGAs.

HDL assemblies are the way compiled HDL workers (in built component libraries) are transformed into the artifacts necessary to execute applications that use workers executing on FPGAs. The steps to using FPGAs with OpenCPI are:

  1. HDL workers are written in an HDL (hardware description language), typically VHDL.

  2. HDL workers are built/compiled for a specific type of FPGA (e.g. Xilinx Zynq or Xilinx ZynqUltrascale)

  3. HDL assemblies are defined in simple XML files as a set of connected HDL workers that can act as a proper subset of an application.

  4. HDL assemblies are converted into ready-to-execute artifacts by a build process that incorporates the built/compiled HDL workers into a bitstream file targeting a particular FPGA platform.

Steps 1 and 2 are performed by HDL component developers who create libraries of HDL workers compiled for a variety of targeted FPGA devices.

Steps 3 and 4 do not require VHDL coding or specific knowledge of or interaction with FPGA tools, but the FPGA development tools (as well as the CDK) are required to be installed.

Step 4 is more complex when the application is accessing I/O devices directly attached to the FPGA, but still requires no VHDL coding nor vendor tools knowledge.

Thus HDL assemblies are in a middle ground between HDL worker development and application execution. Once artifacts are produced from HDL assemblies, neither the CDK nor the FPGA build tools are required. A set of artifacts based on HDL assemblies and built for some HDL platforms, acts as a runtime library for using FPGAs to support executing applications.

Except under unusual conditions (e.g. when the HDL assembly does not fit into the targeted FPGA device), building FPGA artifacts using HDL assemblies can be considered part of application development, and not component development.

Creating HDL assemblies in projects is described in the HDL Assemblies in Projects topic. Building HDL assemblies outside of projects is not explicitly supported.

The HDL-Assemblies-for-Creating-Bitstreams-Executables topic describes steps 3 and 4 in detail.