Multiplier (Multiplier)

Multiplies a signed integer by another signed integer.

Design

The primitive infers a multiplier with both input and output pipelined stages. Providing this simple function in its own primitive encourages synthesis tools to perform register packing such that the multiplier and registers are replaced by DSP blocks/slices. The mathematical representation of the implementation is given in (158).

(158)\[q[n] = x[n] * y[n]\]

In (158):

• \(x[n]\) and \(y[n]\) are the input values.

• \(q[n]\) is the product output value.

Implementation

This primitive is pipelined, with the number of input and output pipelined stages independently controlled by separate generics, allowing them to be matched to a specific device’s DSP blocks/slices. As this primitive takes multiple clock cycles, a valid flag is provided to mark when the output is valid.

Interface

Generics

• data_width_a_g (integer): Width of input a.

• data_width_b_g (integer): Width of input b.

• input_shift_length_g (integer): Sets the number of pipeline stages on the inputs.

• output_shift_length_g (integer): Sets the number of pipeline stages on the output (must be > 0).

Ports

• clk (std_logic), in: Clock. Inputs and outputs registered on rising edge.

• reset (std_logic), in: Reset. Active high, synchronous with rising edge of clock.

• enable (std_logic), in: Enable. Primitive enabled when high.

• input_valid (std_logic), in : Indicates that the value at data_a and data_b are both valid.

• data_a (signed, data_width_a_g), in : Input a to use in the multiplier.

• data_b (signed, data_width_b_g), in : Input b to use in the multiplier.

• data_out (signed, data_width_a_g + data_width_b_g), out: Product of the multiplier

• output_valid (std_logic), out: Indicates that data_out is valid.

Dependencies

The dependencies to other elements in OpenCPI are:

• None.

There is also a dependency on:

• ieee.std_logic_1164

• ieee.numeric_std

Limitations

Limitations of multiplier are:

• output_shift_length_g >= 1.